Further ReadingĮfficient Shift Registers, LFSR Counters, and Long Pseudo-Random Sequence Generators, Alternatively use an LFSR of different length or tap points for each bit. If the number is being used as a dither stream you may want to introduce a mapping layer, for example swap every other bit. LFSRs are a great way to create a 1-bit random number stream but if you are taking multiple consecutive bits that there is a correlation between values, it is the same number shifted plus dither bit. If you needed a sequence of 69,273,666 you would have to implement a 31 bit LFSR and choose 30 bits for your random number. The Last (tap) feedback point defines the effective length of the LFSR, after that it would just be a shift register and have no bearing on the feedback sequence. If you are unsure of the order of the taps, remember that the MSB will always be a feedback point. The first would have a feedback term of: feedback = data ^ data ^ data ^ data With N bits a Maximal LFSR will have (2**N) - 1 states. When considering the implementation of the LFSR, the bit width of the random number and the repeatability of the number need to be considered. Implementation is relatively simple, a shift register with a number of terms XORd together to create the feedback term. Just put it in a loop and let the synthesis tool figure out the logic: module fibonacci_lfsr_nbitĭata_next = Īssign stage = !stage ^ stage Īn LFSR is often the first port of call. Repeating Morgan's example below, but to get a 5 bit number each cycle: module fibonacci_lfsr_5bit(Įdit: Added a new version below which doesn't require you to do the math. However, if you want a new number every clock cycle the other option is to unroll the loop and predict what the number will be in N cycles. If you want an N bit random number you have to run the LFSR for N cycles. The number of bits in the LFSR only set how many values you get before the sequence repeats. As noted in Morgan's answer this will only produce a single random bit.
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